high vertical integration

Network and data center operators need fast and affordable pluggable transceivers that perform well enough to cover a wide range of link lengths. However, power consumption and thermal management are the big obstacles in the roadmap to scale high-speed transceivers into Terabit speeds.

Over the last two decades, power ratings for pluggable modules have increased as we moved from direct detection to more power-hungry coherent transmission: from 2W for SFP modules to 3.5 W for QSFP modules and now to 14W for QSSFP-DD and 21.1W for OSFP form factors. Rockley Photonics researchers estimate that a future electronic switch filled with 800G modules would draw around 1 kW of power just for the optical modules.

Around 50% of a coherent transceiver’s power consumption goes into the digital signal processing (DSP) chip that also performs the functions of clock data recovery (CDR), optical-electrical gear-boxing, and lane switching. Scaling to higher bandwidths leads to even more losses and energy consumption from the DSP chip and its radiofrequency (RF) interconnects with the optical engine.

Thus, a great incentive exists to optimize the interface between the module’s DSP chip and the optical engine to make the transceiver more energy efficient. This need for optimization and efficiency makes co-designing the optical and electronic systems of the transceiver more important than ever.

Co-Designing the Optimal DSP

Coherent DSPs are already application-specific integrated circuits (ASICs), but they could fit their respective optical engines and use cases even more tightly. Transceiver developers often source their DSP, laser, and optical engine from different suppliers, so all these chips are designed separately from each other. This setup reduces the time to market and simplifies the research and design processes but comes with trade-offs in performance and power consumption.

In such cases, the DSP is like a Swiss army knife: a jack of all trades designed for different kinds of PIC but a master of none. For example, many 400ZR+ transceivers used for telecom metro and long-haul applications are using the same DSPs as 400ZR transceivers used for much shorter data center interconnects. Given the ever-increasing demand for capacity and the need for sustainability both as financial and social responsibility, transceiver developers are increasingly in need of a steak knife rather than a Swiss army knife.

Co-designing the DSP chip alongside the photonic integrated circuit (PIC) can lead to a much better fit between these components. A co-design approach helps identify in greater detail the trade-offs between various parameters in the DSP and PIC and thus improve system-level performance optimization. A DSP optimized for a specific optical engine and application could save up to a couple of Watts of power compared to the usual transceiver and DSP designs. 

Co-designing DSP Interfaces for Power Efficiency

Since the optical engine and DSP operate with signals of differing intensities, they need some analog electronic components to “talk” to each other. On the transmit side, the electronic driver block takes signals from the DSP, converts them to a higher voltage, and drives the optical engine. On the receive side, a trans-impedance amplifier (TIA) block will boost the weak signal captured by the optical detector so that the DSP can more easily process it. This signal power conversion overhead constitutes roughly 10-15% of transceiver power consumption, as shown in Figure 1.

Co-designing the DSP and PIC could enable ways to decrease this power conversion overhead. For example, the modulator of the optical engine could be designed to run at a lower voltage that is more compatible with the signal output of the DSP. This way, the DSP could drive the optical engine directly without the need for the analog electronic driver. Such a setup could save roughly two watts of power consumption!

Co-design is also vital to optimize the transceiver layout floorplan. This plan must consider the power dissipation of all transceiver building blocks to avoid hot spots and thermal interference from the DSP to the highly thermally sensitive PIC. The positioning of all bond pads and interfaces is also very important for signal and power integrity, requiring a co-design with the package and substrate.

During this floorplan development, the RF interconnections between the DSP and PIC can be made as short as possible. These optimized RF interconnects reduce the optical and thermal losses in the transceiver package and will reduce the power consumption of the analog electronic driver and amplifier.

Co-Designing Fit-For-Purpose DSPs and PICs

As shown in Figure 4, a DSP chip contains a sequence of processing blocks that compensate for different transmission issues in the fiber and then recover, decode, and error-correct the data streams. Different applications might require slightly different layouts of the DSP or might not need some processing blocks.

For example, full DSP compensation might be required for long links that span several hundreds of kilometers, but a shorter link might not require all the DSP functions. In these cases, a transceiver could turn off or reduce certain DSP functions—such as chromatic dispersion compensation—to save power. These power-saving features could be particularly useful for the cases of shorter data center interconnect links (DCI). On the optical engine side, the laser might not require a high power to transmit over this shorter DCI link so the amplifier functions could shut down. Co-designing the DSP and PIC allows a transceiver developer to mix and match these different energy-saving features to achieve the lowest possible power for a specific application.

Takeaways

Power consumption has become the big barrier that prevents pluggable transceivers from scaling up to 800G and Terabit speeds. Overcoming this barrier requires a tighter fit between the optics and electronics of the transceiver, especially when it comes to the interface between the optical engine and the electronic DSP. By co-designing the optical engine and the electronic DSP, transceiver developers could avoid the need for an external electrical driver and reduce transceiver power consumption by 10-15%. A co-design approach can also make it easier to design fit-for-purpose transceivers that implement power-saving features tailored to specific application cases.

The benefits of this co-design approach led EFFECT Photonics to incorporate talent and intellectual property from Viasat’s Coherent DSP team. With this merger, EFFECT Photonics aims to co-design our Optical System-On-Chip with the DSP to develop fit-for-purpose transceivers that are more energy-efficient than ever before.

Tags: acquisition, coherent, coherent communication systems, coherent optical module vendor, DSP, FEC, forward error correction, green, green transceivers, high vertical integration, independent coherent optical module vendor, Integrated Photonics, optical digital signal processing, optical engine, optical transceivers, photonic integration, Photonics, pluggables, Transceivers, tunable laser, tuneability

Carriers must solve the dilemma of how to use small and affordable coherent pluggables while still having enough performance and reach to cover most of their network links. At EFFECT Photonics, we believe coherent pluggables with an optical System-on-Chip (SoC) can play a vital role in solving this carrier’s dilemma and simplifying network upgrades. Meanwhile, these new coherent pluggables could also enable longer, and higher-capacity data center interconnects for more sustainable data center architectures. Another big factor in making networks more affordable and sustainable is software-defined networks (SDNs) and automation. SDNs enable the network function virtualization (NFV), which allows operators to implement more functions to manage and orchestrate the network. Operators will reap even further benefits by using an artificial intelligence (AI) management and orchestration layer with the SDN/NFV layer, as shown in the figure below.

However, creating a fully automated network that can handle the ever-increasing amount of data and connected devices requires us to go beyond just adjusting the higher network layers. The orchestration and management software should also interface with the physical layer of the network, and that requires smart optical pluggable that adapt to varying network requirements. These requirements place additional burdens on digital signal processors (DSPs). DSPs are a vital component of coherent communication systems, as they perform the coding, decoding, and error corrections on the optical signal. Fortunately, the advances in electronic integration and standards make it so that a versatile coherent pluggable can benefit from an equally versatile and reconfigurable DSP.

Future Automated Networks Must Also Work on the Physical Layer

Telecom and datacom providers who want to become market leaders must scale up while also learning to allocate their existing network resources most efficiently and dynamically. SDNs can help achieve this efficient, dynamic network management. In a nutshell, the SDN paradigm separates the switching hardware from the software, allowing operators to virtualize network functions in a single centralized controller unit. This centralized management and orchestration (MANO) layer can implement network functions that the switches do not, allowing network operators to allocate network resources more intelligently and dynamically. This added flexibility and optimization will improve network outcomes for operators.

However, the upcoming 5G networks will consist of a massive number of devices, software applications, and technologies. EFFECT Photonics believes that handling all these new devices and use cases will require self-managed, zero-touch automated networks. Realizing this full network automation requires two additional components alongside SDN and NFV:

• Artificial intelligence and machine learning algorithms for complete network automation: For example, AI in network management will become a significant factor in reducing the energy consumption of future telecom networks.
• Sensor and control data flow across all OSI model layers, including the physical layer: As networks get bigger and more complex, the management and orchestration (MANO) software needs more degrees of freedom and knobs to adjust. Next-generation MANO software needs to adjust and optimize both the physical and network layers to fit the network best.

Achieving the second goal requires smart optical equipment and components that can be diagnosed and managed remotely from the MANO layer. This context is where smart pluggable transceivers with reconfigurable DSPs come into play.

The Importance of Standardized Error Correction 

Forward error correction (FEC) implemented by DSPs has become a vital component of coherent communication systems. FEC makes the coherent link much more tolerant to noise than a direct detect system and enables much longer reach and higher capacity. Thanks to FEC, coherent links can handle bit error rates that are literally a million times higher than a typical direct detect link. In other words, FEC algorithms allow the DSP to enhance the link performance without changing the hardware. This enhancement is analogous to imaging cameras: image processing algorithms allow the lenses inside your phone camera to produce a higher-quality image.

When coherent transmission emerged, all FEC algorithms were proprietary. Equipment and component manufacturers closely guarded their FEC because it provided a critical competitive advantage. Therefore, coherent transceivers from different vendors could not operate with each other, and a single vendor had to be used for the entire network deployment. However, vendors had to adapt with data center providers pushing disaggregation deeper into communication networks. Their coherent transceivers needed to become interoperable, so FEC algorithms needed standardization. The OIF 400ZR standard for data center interconnects uses a public algorithm called concatenated FEC (CFEC). In contrast, some 400ZR+ MSA standards use open FEC (oFEC), which provides a more extended reach at the cost of a bit more bandwidth and energy consumption. For the longest possible link lengths (500+ kilometers), proprietary FECs become necessary for 400G transmission. Still, at least the public FEC standards have achieved interoperability for a large segment of the 400G transceiver market.

A Smart DSP to Rule All Network Links

A smart pluggable transceiver that can adapt to all the applications we have mentioned before—data centers, carrier networks, SDNs—requires an equally smart and versatile DSP. It must be a DSP that can be reconfigured via software to adapt to different network conditions and use cases. For example, a smart DSP could switch among different FEC algorithms to adapt to network performance and use cases. For example, let’s look at the case of upgrading a long metro link of 650km running at 100 Gbps with open FEC. The operator needs to increase that link capacity to 400 Gbps, but open FEC could struggle to provide the necessary link performance. However, if the DSP can be reconfigured to use a proprietary FEC standard, the transceiver will be able to handle this upgraded link.

	400ZR	Open ZR+	Proprietary Long Haul
Target Application	Edge data center interconnect	Metro, Regional data center interconnect	Long-Haul Carrier
Target Reach @ 400G	120km	500km	1000 km
Form Factor	QSFP-DD/OSFP	QSFP-DD/OSFP	QSFP-DD/OSFP
FEC	CFEC	oFEC	Proprietary
Standards / MSA	OIF	OpenZR+ MSA	Proprietary

Reconfigurable DSPs can also be beneficial to auto-configure links to deal with specific network conditions, especially in brownfield links. For example, the DSP can be reconfigured to transmit at a higher baud rate if the link has a good quality fiber. However, the DSP could be reconfigured to scale down the baud rate to avoid bit errors if the fiber quality is poor. If the smart pluggable detects that the fiber length is relatively short, it could scale down the laser transmitter power or the DSP power consumption to save energy.

Takeaways

A versatile pluggable that can handle different use cases – data center links, long metro links, and dynamic management and orchestration layers – must have the ability to use different coding and error coding schemes and adapt to different network requirements. The DSP must be equally versatile and switch among several operating modes – 400ZR, 400ZR+, proprietary – and error correction methods – cFEC, oFEC, and proprietary. Together with a programmable optical system on chip, the DSP can not just add software corrections but also make optical hardware changes (output power, turn amplifiers on/off) to adapt to different noise scenarios. Through these adjustments, the next generation of pluggable transceivers will be able to handle all the telecom carrier and data center use cases we can throw at it. Tags: acquisition, coherent, coherent communication systems, coherent optical module vendor, DSP, FEC, forward error correction, green, green transceivers, high vertical integration, independent coherent optical module vendor, Integrated Photonics, optical digital signal processing, optical engine, optical transceivers, photonic integration, Photonics, pluggables, Transceivers, tunable laser, tuneability