– LightWave
InP
What DSPs Does the Network Edge Need?
Operators are strongly interested in 100G pluggables that can house tunable coherent optics in compact,…
Operators are strongly interested in 100G pluggables that can house tunable coherent optics in compact, low-power form factors like QSFP28. A recently released Heavy Reading survey revealed that over 75% of operators surveyed believe that 100G coherent pluggable optics will be used extensively in their edge and access evolution strategy.
These new 100G coherent pluggables will have very low power consumption (less than six Watts) and will be deployed in uncontrolled environments, imposing new demands on coherent digital signal processors (DSPs). To enable this next generation of coherent pluggables in the network edge, the next generation of DSPs needs ultra-low power consumption, co-designing with the optical engine, and industrial hardening.
The Power Requirements of the Network Edge
Several applications in the network edge can benefit from upgrading their existing 10G DWDM, or 100G grey links into 100G DWDM, such as the aggregation of fixed and mobile access networks and 100G data center interconnects for enterprises. However, network providers have often chosen to stick to their 10G links because the existing 100G solutions do not check all the required boxes.
100G direct detect pluggables have a more limited reach and are not always compatible with DWDM systems. “Scaled down” coherent 400ZR solutions have the required reach and tunability, but they are too expensive and power-hungry for edge applications. Besides, the ports in small to medium IP routers used in edge deployments often do not support QSFP-DD modules commonly used in 400ZR but QSFP28 modules.
The QSFP28 form factor imposes tighter footprint and power consumption constraints on coherent technologies compared to QSFP-DD modules. QSFP28 is slightly smaller, and most importantly, it can handle at most a 6-Watt power consumption, in contrast with the typical 15-Watt consumption of QSFP-DD modules in 400ZR links. Fortunately, the industry is moving towards a proper 100ZR solution in the QSFP28 form factor that balances performance, footprint, and power consumption requirements for the network edge.
These power requirements also impact DSP power consumption. DSPs constitute roughly 50% of coherent transceiver power consumption, so a DSP optimized for the network edge 100G use cases should aim to consume at most 2.5 to 3 Watts of power.
Co-Designing and Adjusting for Power Efficiency
Achieving this ambitious power target will require scaling down performance in some areas and designing smartly in others. Let’s discuss a few examples below.
- Modulation: 400ZR transceivers use a more power-hungry 16QAM modulation. This modulation scheme uses sixteen different states that arise from combining four different intensity levels and four phases of light. The new generation of 100ZR transceivers might use some variant of a QPSK modulation, which only uses four states from four different phases of light.
- Forward Error Correction (FEC): DSPs in 400ZR transceivers use a more advanced concatenated FEC (CFEC) code, which combines inner and outer FEC codes to enhance the performance compared to a standard FEC code. The new 100ZR transceivers might use a more basic FEC type like GFEC. This is one of the earliest optical FEC algorithms and was adopted as part of the ITU G.709 specification.
- Co-Designing DSP and Optical Engine: As we explained in a previous article about fit-for-platform DSPs, a transceiver optical engine designed on the indium phosphide platform could be designed to run at a voltage compatible with the DSP’s signal output. This way, the optimized DSP could drive the PIC directly without needing a separate analog driver, doing away with a significant power conversion overhead compared to a silicon photonics setup, as shown in the figure below.
Industrial Hardening for DSPs
Traditionally, coherent devices have resided in the controlled settings of data center machine rooms or network provider equipment rooms. These rooms have active temperature control, cooling systems, dust and particle filters, airlocks, and humidity control. In such a setting, pluggable transceivers must operate within the so-called commercial temperature range (c-temp) from 0 to 70ºC.
On the other hand, the network edge often involves uncontrolled settings outdoors at the whims of Mother Nature. It might be at the top of an antenna, on mountain ranges, within traffic tunnels, or in Northern Europe’s severe winters. For these outdoor settings, transceivers should operate in the industrial temperature range (I-temp) from -40 to 85ºC. Higher altitude deployments provide additional challenges too. Because the air gets thinner, networking equipment cooling mechanisms become less effective, and the device cannot withstand casing temperatures as high as they can at sea level.
Takeaways
The network edge could benefit from switching their existing direct detect or grey links to 100G DWDM coherent. However, the industry needs more affordable and power-efficient transceivers and DSPs specifically designed for coherent 100G transmission in edge and access networks. By realizing DSPs co-designed with the optics, adjusted for reduced power consumption, and industrially hardened, the network edge will have coherent DSP and transceiver products adapted to their needs.
Tags: 100ZR, access network, co-design, controlled, edge, fit for platform DSP, InP, low power, pluggables, power consumption, power conversion, QSFP 28, QSFP-DDHow To Make a Photonic Integrated Circuit
Photonics is one of the enabling technologies of the future. Light is the fastest information…
Photonics is one of the enabling technologies of the future. Light is the fastest information carrier in the universe and can transmit this information while dissipating less heat and energy than electrical signals. Thus, photonics can dramatically increase the speed, reach, and flexibility of communication networks and cope with the ever-growing demand for more data. And it will do so at a lower energy cost, decreasing the Internet’s carbon footprint. Meanwhile, fast and efficient photonic signals have massive potential for sensing and imaging applications in medical devices, automotive LIDAR, agricultural and food diagnostics, and more.
Given its importance, we want to explain how photonic integrated circuits (PICs), the devices that enable all these applications, are made.
Designing a PIC
The process of designing a PIC should translate an initial application concept into a functioning photonics chip that can be manufactured. In a short course at the OFC 2018 conference, Wim Bogaerts from Ghent University summarized the typical PIC design process in the steps we will describe below.
- Concept and Specifications: We first have to define what goes into the chip. A chip architect normally spends time with the customer to understand what the customer wants to achieve with the chip and all the conditions and situations where the chip will be used. After these conversations, the chip application concept becomes a concrete set of specifications that are passed on to the team that will design the internals of the chip. These specs will set the performance targets of the PIC design.
- Design Function: Having defined the specs, the design team will develop a schematic circuit diagram that captures the function of the PIC. This diagram is separated into several functional blocks: some of them might already exist, and some of them might have to be built. These blocks include lasers, modulators, detectors, and other components that can manipulate light in one way or another.
- Design Simulation: Making a chip costs a lot of money and time. With such risks, a fundamental element of chip design is to accurately predict the chip’s behavior after it is manufactured. The functional blocks are placed together, and their behavior is simulated using various physical models and simulation tools. The design team often uses a few different simulation approaches to reduce the risk of failure after manufacturing.
- Design Layout: Now, the design team must translate the functional chip schematic into a proper design layout that can be manufactured. The layout consists of layers, component positions, and geometric shapes that represent the actual manufacturing steps. The team uses software that translates these functions into the geometric patterns to be manufactured, with human input required for the trickiest placement and geometry decisions.
- Check Design Rules: Every chip fabrication facility will have its own set of manufacturing rules. In this step, the design team verifies that the layout agrees with these rules.
- Verify Design Function: This is a final check to ensure that the layout actually performs as was originally intended in the original circuit schematic. The layout process usually leads to new component placement and parasitic effects that were not considered in the original circuit schematic. These tests might require the design team to revisit previous functional or layout schematic steps.
The Many Steps of Fabricating a PIC
Manufacturing semiconductor chips for photonics and electronics is one of the most complex procedures in the world. For example, back in his university days, EFFECT Photonics President Boudewijn Docter described a fabrication process with a total of 243 steps!
Yuqing Jiao, Associate Professor at the Eindhoven University of Technology (TU/e), explains the fabrication process in a few basic, simplified steps:
- Grow or deposit your chip material
- Print a pattern on the material
- Etch the printed pattern into your material
- Do some cleaning and extra surface preparation
- Go back to step 1 and repeat as needed
Real life is, of course, a lot more complicated and will require cycling through these steps tens of times, leading to processes with more than 200 total steps. Let’s go through these basic steps in a bit more detail.
- Layer Epitaxy and Deposition: Different chip elements require different semiconductor material layers. These layers can be grown on the semiconductor wafer via a process called epitaxy or deposited via other methods (which are summarized in this article).
- Lithography (i.e. printing): There are a few lithography methods, but the one used for high-volume chip fabrication is projection optical lithography. The semiconductor wafer is coated with a photosensitive polymer film called a photoresist. Meanwhile, the design layout pattern is transferred to an opaque material called a mask. The optical lithography system projects the mask pattern onto the photoresist. The exposed photoresist is then developed (like photographic film) to complete the pattern printing.
- Etching: Having “printed” the pattern on the photoresist, it is time to remove (or etch) parts of the semiconductor material to transfer the pattern from the resist into the wafer. There are several techniques that can be done to etch the material, which are summarized in this article.
- Cleaning and Surface Preparation: After etching, a series of steps will clean and prepare the surface before the next cycle.
- Passivation: Adding layers of dielectric material (such a silica) to “passivate” the chip and make it more tolerant to environmental effects.
- Planarization: Making the surface flat in preparation of future lithography and etching steps.
- Metallization: Depositing metal components and films on the wafer. This might be done for future lithography and etching steps, or at the end to add electrical contacts to the chip.
Figure 6 summarizes how an InP photonic device looks after the steps of layer epitaxy, etching, dielectric deposition and planarization, and metallization.
The Expensive Process of Testing and Packaging
Chip fabrication is a process with many sources of variability, and therefore much testing is required to make sure that the fabricated chip agrees with what was originally designed and simulated. Once that is certified and qualified, the process of packaging and assembling a device with the PIC follows.
While packaging, assembly, and testing are only a small part of the cost of electronic systems, the reverse happens with photonic systems. Researchers at the Technical University of Eindhoven (TU/e) estimate that for most Indium Phosphide (InP) photonics devices, the cost of packaging, assembly, and testing can reach around 80% of the total module cost. There are many research efforts in motion to reduce these costs, which you can learn more about in one of our previous articles.
Especially after the first fabrication run of a new chip, there will be a few rounds of characterization, validation and revisions to make sure the chip performs up to spec. After this first round of characterization and validation, the chip must be made ready for mass production, which requires a series of reliability tests in several environmental different conditions. You can learn more about this process in our previous article on industrial hardening. For example, different applications need different certification of the temperatures in which the chip must operate in.
Temperature Standard | Temperature Range (°C) | |
Min | Max | |
Commercial (C-temp) | 0 | 70 |
Extended (E-temp) | -20 | 85 |
Industrial (I-temp) | -40 | 85 |
Automotive / Full Military | -40 | 125 |
Takeaways
The process of making photonic integrated circuits is incredibly long and complex, and the steps we described in this article are a mere simplification of the entire process. It requires tremendous amount of knowledge in chip design, fabrication, and testing from experts in different fields all around the world. EFFECT Photonics was founded by people who fabricated these chips themselves, understand the process intimately, and developed the connections and network to develop cutting-edge PICs at scale.
Tags: building blocks, c-temp, coherent, die testing, DSP, electron beam lithography, faults, I-temp, imprint lithography, InP, interfaces, optical lithography, reach, scale, wafer testingWhat’s an ITLA and Why Do I Need One?
The tunable laser is a core component of every optical communication system, both direct detect…
The tunable laser is a core component of every optical communication system, both direct detect and coherent. The laser generates the optical signal modulated and sent over the optical fiber. Thus, the purity and strength of this signal will have a massive impact on the bandwidth and reach of the communication system.
Depending on the material platform, system architecture, and requirements, optical system developers must balance laser parameters—tunability, purity, size, environmental resistance, and power—for the best system performance.
In this article, we will talk about one specific kind of laser—the integrable tunable laser assembly (ITLA)—and when it is needed.
When Do I Need an ITLA?
The promise of silicon photonics (SiP) is compatibility with existing electronic manufacturing ecosystems and infrastructure. Integrating silicon components on a single chip with electronics manufacturing processes can dramatically reduce the footprint and the cost of optical systems and open avenues for closer integration with silicon electronics on the same chip. However, the one thing silicon photonics misses is the laser component.
Silicon is not a material that can naturally emit laser light from electrical signals. Decades of research have created silicon-based lasers with more unconventional nonlinear optical techniques. Still, they cannot match the power, efficiency, tunability, and cost-at-scale of lasers made from indium phosphide (InP) and other III-V compound semiconductors.
Therefore, making a suitable laser for silicon photonics does not mean making an on-chip laser from silicon but an external laser from III-V materials such as InP. This light source will be coupled via optical fiber to the silicon components on the chip while maintaining a low enough footprint and cost for high-volume integration. The external laser typically comes in the form of an integrable tunable laser assembly (ITLA).
Meanwhile, a photonic chip developer that uses the InP platform for its entire chip instead of silicon can use an integrated laser directly on its chip. Using an external or integrated depends on the transceiver developer’s device requirements, supply chain, and manufacturing facilities and processes. You can read more about the differences in this article.
What is an ITLA?
In summary, an integrable tunable laser assembly (ITLA) is a small external laser that can be coupled to an optical system (like a transceiver) via optical fiber. This ITLA must maintain a low enough footprint and cost for high-volume integration with the optical system.
Since the telecom and datacom industries want to pack more and more transceivers on a single router faceplate, ITLAs need to maintain performance while moving to smaller footprints and lower power consumption and cost.
Fortunately, such ambitious specifications became possible thanks to improved photonic integration technology. The original 2011 ITLA standard from the Optical Internetworking Forum (OIF) was 74mm long by 30.5mm wide. By 2015, most tunable lasers shipped in a micro-ITLA form factor that cut the original ITLA footprint in half. In 2021, the nano-ITLA form factor designed for QSFP-DD and OSFP modules had once again cut the micro-ITLA footprint almost in half. The QSFP-DD modules that house the full transceiver are smaller (78mm by 20mm) than the original ITLA form factor. Stunningly, tunable laser manufacturers achieved this size reduction without impacting laser purity and power.
The Exploding Market for ITLAs
With the increasing demand for coherent transceivers, many companies have performed acquisitions and mergers that allow them to develop transceiver components internally and thus secure their supply. LightCounting predicts that this consolidation will decrease the sales of modulator and receiver components but that the demand for tunable lasers (mainly in the form of ITLAs) will continue to grow. The forecast expects the tunable laser market for transceivers to reach a size of $400M in 2026. We talk more about these market forces in one of our previous articles.
However, the industry consolidation will make it harder for component and equipment manufacturers to source lasers from independent vendors for their transceivers. The market needs more independent vendors to provide high-performance ITLA components that adapt to different datacom or telecom provider needs. Following these trends, at EFFECT Photonics we are not only developing the capabilities to provide a complete, fully-integrated coherent transceiver solution but also the ITLA units needed by vendors who use external lasers.
Takeaways
The world is moving towards tunability. As telecom and datacom industries seek to expand their network capacity without increasing their fiber infrastructure, the sales of tunable transceivers will explode in the coming years. These transceivers need tunable lasers with smaller sizes and lower power consumption than ever.
Some transceivers will use lasers integrated directly on the same chip as the optical engine. Others will have an external laser coupled via fiber to the optical engine. The need for these external lasers led to the development of the ITLA form factors, which get smaller and smaller with every generation.
Tags: coherent, Density, discrete, DSP, full integration, high-performance, independent, InP, ITLA, micro ITLA, nano ITLA, power consumption, reach, SiP, size, tunable, tunable lasers, versatileWhat’s Inside a Tunable Laser for Coherent Systems?
The world is moving towards tunability. The combination of tunable lasers and dense wavelength division…
The world is moving towards tunability. The combination of tunable lasers and dense wavelength division multiplexing (DWDM) allows the datacom and telecom industries to expand their network capacity without increasing their existing fiber infrastructure. Furthermore, the miniaturization of coherent technology into pluggable transceiver modules has enabled the widespread implementation of IP over DWDM solutions. Self-tuning algorithms have also made DWDM solutions more widespread by simplifying installation and maintenance. Hence, many application cases—metro transport, data center interconnects, and —are moving towards tunable pluggables.
The tunable laser is a core component of all these tunable communication systems, both direct detection and coherent. The laser generates the optical signal modulated and sent over the optical fiber. Thus, the purity and strength of this signal will have a massive impact on the bandwidth and reach of the communication system. This article will clarify some critical aspects of laser design for communication systems.
External and Integrated Lasers: What’s the Difference?
The promise of silicon photonics (SiP) is compatibility with existing electronic manufacturing ecosystems and infrastructure. Integrating silicon components on a single chip with electronics manufacturing processes can dramatically reduce the footprint and the cost of optical systems and open avenues for closer integration with silicon electronics on the same chip. However, the one thing silicon photonics misses is the laser component.
Silicon is not a material that can naturally emit laser light from electrical signals. Decades of research have created silicon-based lasers with more unconventional nonlinear optical techniques. Still, they cannot match the power, efficiency, tunability, and cost-at-scale of lasers made from indium phosphide (InP) and III-V compound semiconductors.
Therefore, making a suitable laser for silicon photonics does not mean making an on-chip laser from silicon but an external laser from III-V materials such as InP. This light source will be coupled via optical fiber to the silicon components on the chip while maintaining a low enough footprint and cost for high-volume integration. The external laser typically comes in the form of an integrable tunable laser assembly (ITLA).
In contrast, the InP platform can naturally emit light and provide high-quality light sources and amplifiers. This allows for photonic system-on-chip designs that include an integrated laser on the chip. The integrated laser carries the advantage of reduced footprint and power consumption compared to an external laser. These advantages become even more helpful for PICs that need multiple laser channels.
Finally, integrated lasers enable earlier optical testing on the semiconductor wafer and die. By testing the dies and wafers directly before packaging them into a transceiver, manufacturers need only discard the bad dies rather than the whole package, which saves valuable energy, materials, and cost.
Using an external or integrated laser depends on the transceiver developer’s device requirements, supply chain, and manufacturing facilities and processes. At EFFECT Photonics, we have the facilities and expertise to provide fully-integrated InP optical systems with an integrated laser and the external laser component that a silicon photonics developer might need for their optical system.
What are the key requirements for a laser in coherent systems?
In his recent talk at ECOC 2022, our Director of Product Management, Joost Verberk, outlined five critical parameters for laser performance.
- Tunability: With telecom providers needing to scale up their network capacity without adding more fiber infrastructure, combining tunable lasers with dense wavelength division multiplexing (DWDM) technology becomes necessary. These tunable optical systems have become more widespread thanks to self-tuning technology that removes the need for manual tuning. This makes their deployment and maintenance easier.
- Spectral Purity: Coherent systems encode information in the phase of the light, and the purer the light source is, the more information it can transmit. An ideal, perfectly pure light source can generate a single, exact color of light. However, real-life lasers are not pure and will generate light outside their intended color. The size of this deviation is what we call the laser linewidth. An impure laser with a large linewidth will have a more unstable phase that propagates errors in its transmitted data, as shown in the diagram below. This means it will transmit at a lower speed than desired.
- Dimensions: As the industry moves towards packing more and more transceivers on a single router faceplate, tunable lasers need to maintain performance and power while moving to smaller footprints. Laser manufacturers have achieved size reductions thanks to improved integration without impacting laser purity and power, moving from ITLA to micro-ITLA and nano-ITLA form factors in a decade.
- Environmental Resistance: Lasers used in edge and access networks will be subject to harsh environments, like temperature and moisture changes. For these use cases, lasers should operate in the industrial temperature (I-temp) range of -40 to 85ºC for these environments.
- Transmit Power: The required laser output power will depend on the application and the system architecture. For example, a laser fully integrated into the chip can reach higher transmit powers more easily because it avoids the interconnection losses of an external laser. Still, shorter-reach applications might not necessarily need such powers.
The Promise of Multi-Laser Arrays
Earlier this year, Intel Labs demonstrated an eight-wavelength laser array fully integrated on a silicon wafer. These milestones are essential for tunable DWDM because the laser arrays can allow for multi-channel transceivers that are more cost-effective when scaling up to higher speeds.
Let’s say we need a link with 1.6 Terabits/s of capacity. There are three ways we could implement it:
- Four modules of 400G: This solution uses existing off-the-shelf modules but has the largest footprint. It requires four slots in the router faceplate and an external multiplexer to merge these into a single 1.6T channel.
- One module of 1.6T: This solution will not require the external multiplexer and occupies just one plug slot on the router faceplate. However, making a single-channel 1.6T device has the highest complexity and cost.
- One module with four internal channels of 400G: A module with an array of four lasers (and thus four different 400G channels) will only require one plug slot on the faceplate while avoiding the complexity and cost of the single-channel 1.6T approach.
Multi-laser array and multi-channel solutions will become increasingly necessary to increase link capacity in coherent systems. They will not need more slots in the router faceplate while simultaneously avoiding the higher cost and complexity of increasing the speed with just a single channel.
Takeaways
The combination of tunable lasers and dense wavelength division multiplexing (DWDM) allows the datacom and telecom industries to expand their network capacity without increasing their existing fiber infrastructure. Thanks to the miniaturization of coherent technology and self-tuning algorithms, many application cases—metro transport, data center interconnects, and future access networks—will eventually move towards coherent tunable pluggables.
These new application cases will have to balance the laser parameters we described early—tunability, purity, size, environmental resistance, power—depending on their material platforms, system architecture, and requirements. Some will need external lasers; some will want a fully-integrated laser. Some will need multi-laser arrays to increase capacity; others need more stringent temperature certifications.
Following these trends, at EFFECT Photonics, we are not only developing the capabilities to provide a complete, coherent transceiver solution but also the external nano-ITLA units needed by other vendors.
Tags: coherent, DBR, DFB, ECL, full integration, InP, ITLA, micro ITLA, nano ITLA, SiP, tunableThe Future of Coherent DSP Design: Interview with Russell Fuerst
Digital signal processors (DSPs) are the heart of coherent communication systems. They not only encode/decode…
Digital signal processors (DSPs) are the heart of coherent communication systems. They not only encode/decode data into the three properties of a light signal (amplitude, phase, polarization) but also handle error correction, analog-digital conversation, Ethernet framing, and compensation of dispersion and nonlinear distortion. And with every passing generation, they are assigned more advanced functions such as probabilistic constellation shaping.
There are still many challenges ahead to improve DSPs and make them transmit even more bits in more energy-efficient ways. Now that EFFECT Photonics has incorporated talent and intellectual property from Viasat’s Coherent DSP team, we hope to contribute to this ongoing research and development and make transceivers faster and more sustainable than ever. We ask Russell Fuerst, our Vice-President of Digital Signal Processing, how we can achieve these goals.
What’s the most exciting thing about joining EFFECT Photonics?
Before being acquired by EFFECT Photonics, our DSP design team has been a design-for-hire house. We’ve been doing designs for other companies that have put those designs in their products. By joining EFFECT Photonics, we can now do a design and stamp our brand on it. That’s exciting.
The other exciting thing is to have all the technologies under one roof. Having everything from the DSP to the PIC to the packaging and module-level elements in one company will allow us to make our products that much better.
We also find the company culture to be very relaxed and very collaborative. Even though we’re geographically diverse, it’s been straightforward to understand what other people and groups in the company are doing. It’s easy to talk to others and find out whom you need to talk to. There’s not a whole lot of organizational structure that blocks communication, so it’s been excellent from that perspective.
People at EFFECT Photonics were welcoming from day one, making us that much more excited to join.
What key technology challenges must be solved by DSP designers to thrive in the next 5 to 10 years?
The key is to bring the power down while also increasing the performance.
In the markets where coherent has been the de-facto solution, I think it’s essential to understand how to drive cost and power down either through the DSP design itself or by integrating the DSP with other technologies within the module. That will be where the benefits come from in those markets.
Similarly, there are markets where direct detection is the current technology of choice. We must understand how to insert coherent technology into those markets while meeting the stringent requirements of those important high-volume markets. Again, this progress will be largely tied to performance within the power and cost requirements.
As DSP technology has matured, other aspects outside of performance are becoming key, and understanding how we can work that into our products will be the key to success.
How do you think the DSP can be more tightly integrated with the PIC?
This is an answer that will evolve over time. We will become more closely integrated with the team in Eindhoven and learn some of the nuances of their mature design process. And similarly, they’ll understand the nuances of our design process that have matured over the years. As we understand the PIC technology and our in-house capabilities better, that will bring additional improvements that are currently unknown.
Right now, we are primarily focused on the obvious improvements tied to the fully-integrated platform. For example, the fact that we can have the laser on the PIC because of the active InP material. We want to understand how we co-design aspects of the module and shift the complexity from one design piece or component to another, thanks to being vertically integrated.
Another closely-tied area for improvement is on the modulator side. We think that the substantially lower drive voltages required for the InP modulator give us the possibility to eliminate some components, such as RF drivers. We could potentially drive the modulator directly from that DSP without any intermediary electronics, which would reduce the cost and power consumption. That’s not only tied to the lower drive voltages but also some proprietary signal conditioning we can do to minimize some of the nonlinearities in the modulator and improve the performance.
What are the challenges and opportunities of designing DSPs for Indium phosphide instead of silicon?
So, we already mentioned two opportunities with the laser and the modulator.
I think the InP integration makes the design challenges smaller than those facing DSP design for silicon photonics. The fact is that InP can have more active integrated components and that DSPs are inherently active electronic devices, so getting the active functions tuned and matched over time will be a challenge. It motivates our EFFECT DSP team to quickly integrate with the experienced EFFECT PIC design team to understand the fundamental InP platform a bit better. Once we understand it, the DSP designs will get more manageable with improved performance, especially as we have control over the designs of both DSP and PIC. As we get to the point where co-packaging is realized, there will also be some thermal management issues to consider.
When we started doing coherent DSP designs for optical communication over a decade ago, we pulled many solutions from the RF wireless and satellite communications space into our initial designs. Still, we couldn’t bring all those solutions to the optical markets.
However, when you get more of the InP active components involved, some of those solutions can finally be brought over and utilized. They were not used before in our designs for silicon photonics because silicon is not an active medium and lacked the performance to exploit these advanced techniques.
For example, we have done proprietary waveforms tuned to specific satellite systems in the wireless space. Our DSP team was able to design non-standard constellations and modulation schemes that increased the capacity of the satellite link over the previous generation of satellites. Similarly, we could tune the DSP’s waveform and performance to the inherent advantages of the InP platform to improve cost, performance, bandwidth utilization, and efficiency. That’s something that we’re excited about.
Takeaways
As Russell explained, the big challenge for DSP designers continues to be increasing performance while keeping down the power consumption. Finding ways to integrate the DSP more deeply with the InP platform can overcome this challenge, such as direct control of the laser and modulator from the DSP to novel waveform shaping methods. The presence of active components in the InP platforms also gives DSP designers the opportunity to import more solutions from the RF wireless space.
We look forward to our new DSP team at EFFECT Photonics settling into the company and trying out all these solutions to make DSPs faster and more sustainable!
Tags: coherent, DSP, energy efficient, InP, integration, performance, power consumption, Sustainable, Viasat